Lightbits

Lightbits Labs Awarded Four Patents

Lightbits Labs has been assigned patents for “storage system having an in-line hardware accelerator,” “storage system and a method for application aware processing,” “system and method for reducing read latency in storage devices,” and “system and method for controlling a flow of storage access requests.”

SAN JOSE, Calif., June 21, 2021 – Lightbits Labs, the pioneer and leader in NVMe™ over TCP (NVMe/TCP) software-defined storage, today announced it has been assigned four patents (10,956,346) for “Storage system having an in-line hardware accelerator,” (10,963,393) Storage system and a method for application aware processing,” (10,684,964) “System and method for reducing read latency in storage devices,” and (10,990,447) “System and method for controlling a flow of storage access requests.”

The abstract of the patent (10,956,346) published by the U.S. Patent and Trademark Office states: A storage system that includes an in-line hardware accelerator, a solid-state drive (SSD) unit, a central processing unit (CPU), a volatile memory module, and an accelerator memory module that is coupled to the in-line hardware accelerator or belongs to the in-line hardware accelerator; wherein the in-line hardware accelerator is directly coupled to the SSD unit, the volatile memory and the non-volatile memory; wherein the CPU is directly coupled to the volatile memory and to the non-volatile memory; wherein the in-line hardware accelerator is configured to manage access to the SSD unit; wherein the in-line accelerator is configured to retrieve data stored in the volatile memory module and the non-volatile memory module without involving the CPU.

The patent (10,956,346) application was filed on December 29, 2017 (15/857,756).

Inventors: Shmuel Ben-Yehuda, Ofir Efrati, Sagi Grimberg, Eran Kirzner, Ziv Tishel, Fabian Trumper

The abstract of the patent (10,963,393) published by the U.S. Patent and Trademark Office states: A method for accessing a storage system, the method may include receiving a block call, from a processor that executes an application and by a storage engine of a computer that is coupled to a storage system; generating, by the storage engine and based on the block call, a key value call; and sending the key value call to a key value frontend of the storage system.

The patent (10,963,393) application was filed on December 29, 2017 (15/857,758).

Inventors: Shmuel Ben-Yehuda, Ofir Efrati, Abel Alkon Gordon, Eran Kirzner, Fabian Trumper

 

The abstract of the patent (10,684,964) published by the U.S. Patent and Trademark Office states: A system and a method for reducing read latency of a storage media associated with at least one host computer, by at least one processor, may include assigning each storage segment of the non-volatile storage to a first Read-Latency Set (RLS) and a second RLS, wherein the first RLS is attributed a read/write mode and the second RLS is attributed a read-only mode; receiving read-requests and write-requests from the at least one host computer, wherein each of said requests is attributed a priority; and serving the received requests according to RLS work modes and according to the priority of each request.

The patent (10,684,964) application was filed on June 16, 2020 (16/051,500).

Inventors: Abel Alkon Gordon, Sagi Grimberg, Shmuel Ben-Yehuda

 

The abstract of the patent (10,990,447) published by the U.S. Patent and Trademark Office states: A method and a system for controlling the access of a plurality of client computers to storage media, the system including: a processor, a Random-Access Memory (RAM) device; and a Network Interface Controller (NIC), configured to establish a plurality of connections with the clients. The processor may dynamically allocate a buffer memory space to each connected client computer on the RAM device, and the NIC may be configured to receive at least one storage access request from at least one client, over at least one computer network connection. The RAM device may accumulate data of the at least one storage access request in the buffer allocated to the respective connected client computer, and the processor may be configured, upon completion of the accumulation of data, to propagate the buffered data to at least one storage device of the storage media.

The patent (10,990,447) application was filed on July 12, 2018 (16/033,326).

Inventors: Alexander Shpiner, Abel Alkon Gordon, Sagi Grimberg

 

To read the patent abstracts and full detail go to: https://patents.justia.com/assignee/lightbits-labs-ltd

 

For more information on the Lightbits leadership team, go to:  https://www.lightbitslabs.com/company/

 

About Lightbits Labs

Lightbits Labs’ mission is to lead the cloud-native data center transformation by delivering scalable and efficient software defined storage that is easy to consume. Founded in 2016, Lightbits brings the agility of hyperscale storage to private clouds and edge clouds. The company pioneered NVMe/TCP so the solution is easy to deploy at scale, while delivering performance that is similar to local flash. Lightbits Labs is backed by strategic investors including Cisco Investments, Dell Technologies Capital, Intel Capital, and Micron, as well as top investors and VCs including Avigdor Willenz, Lip-Bu Tan, Marius Nacht, SquarePeg Capital, and Celesta Capital.

 

Visit www.lightbitslabs.com or contact us at info@lightbitslabs.com.

Lightbits, Lightbits Labs, LightOS, and Lightbits SuperSSD are trademarks of Lightbits Labs, Ltd.

 

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